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Digital Verification Engineer- SOC Automotive
About The Position
Samsung R&D center is looking for Digital verification Engineer to join us.
Samsung (SIRC), shaping the world of tomorrow, Today. Focusing beyond the horizon and pushing exciting developments in many key areas of technology.
Samsung is creating a new era of continuous innovation, bringing value and contribution to society and creating a workplace where our employees can enjoy making the most of their talent, creativity and passion.
SoC-Automotive verification team is taking an important role in designing Samsung’s automotive application processor and the next generation of Mobile Image Signal Processor (ISP).
What will you do?
- Responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.
- Plan the verification of complex design blocks by fully understanding the design specification, working closely with architecture, design, algorithm teams.
- Leading the top-level IP verification effort from planning to delivery.
- Create a constrained-random verification environment using SystemVerilog and UVM.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Collaborate closely with design and verification engineers in active projects and perform hands-on verification.
- BSc. in Electronic Engineering MSc. an advantage
- At least 5 years’ experience as verification engineer. Completing full development cycle an advantage.
- Knowledge in verification methodologies, tools (simulators, coverage tools, etc.), and techniques
- Knowledge of Verilog, System Verilog or Specman
- Experience in Python / Perl programming
- Good knowledge of UNIX environment
- Self-motivated and self-directed, proactive
- Ability to achieve results in a fast moving, agile flow and dynamic environment, both locally and across the organization
- Ability to troubleshoot and analyze complex problems
- Developing UVM based verification environments
- Experience emulation, Formal