Digital Verification Student
About The Position
Samsung Israel R&D Center is looking for Digital Verification Student to join us!
Samsung (SIRC), shaping the world of tomorrow, Today. Focusing beyond the horizon and pushing exciting developments in many key areas of technology. Samsung is creating a new era of continuous innovation, bringing value and contribution to society and creating a workplace where our employees can enjoy making the most of their talent, creativity and passion.
Soc-Automotive Verification team is required to tackle the full flow of verification, from block & IP level to system level, including interfaces & deep understanding of all design flow and technical teams (such as Digital & FW).
What will you do?
· Responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.
· Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
· Create a constrained-random verification environment using SystemVerilog.
· Coding scripts to make an automatic and generic process.
· Debug tests with design engineers to deliver functionally correct design blocks.
· Collaborate closely with design and verification engineers in active projects.
- B.Sc. student in EE or related, average 85 and above.
- At least 4 semesters until graduation
- Excellent coding skills
- Experience in Perl/Python or other script languages
- Experience in Verilog or VHDL, System Verilog – big advantage
- Team player with great interpersonal skills – a must!
- Fast learning skills
Apply for this position
Azrieli Town, 146 Menachem Begin Rd., Tel Aviv, Israel, 6492103