Formal Verification Engineer
About The Position
Samsung R&D Center is looking for Engineer to join our team.
Samsung (SIRC), shaping the world of tomorrow, Today. Focusing beyond the horizon and pushing exciting developments in many key areas of technology. Samsung is creating a new era of continuous innovation, bringing value and contribution to society and creating a workplace where our employees can enjoy making the most of their talent, creativity and passion.
The Verification Cmos-Image-Sensor-Team is required to tackle the full flow of verification, from block & IP level to system level, including interfaces & deep understanding of all design flow and technical teams (such as Digital & FW).
We are looking for people with a broad set of technical skills, who are ready to tackle some of technology’s greatest challenges, who have the ability to think out of the box and bring the disruptive technologies that will define our future.
· Experienced Formal Verification engineer with over 3 years of related professional experience.
· Advanced knowledge of digital logic design process and verification techniques.
· Experience with Jasper Platform – An advantage.
· Scripting Proficiency in TCL/Perl/Python – An advantage.
· Personality Qualities :
- Ability to lead technical activities.
- Good learning skills.
- Problems solver.
- Strong team player, excellent communication skills and ability to collaborate.
Apply for this position
2 Shoham st. 5251003, Ramat Gan, Israel